The present invention relates to a phase-locked loop in the frequency acquisition section of a computer system.
In writing data on a magnetic recording disk, spin rate and writing frequency, in part, determine the number (density) of cells (positions for recording information) which can be defined on a given track. Each cell represents a set of magnetic dipoles which can be magnetically oriented by a magnetic field from a recording head. Data is stored and retrieved based upon changes (or transitions) in dipole orientation from cell to cell to cell.
Generally, system storing and retrieving frequency (i.e., writing/reading frequency) is set to maximize cell density. In a system with a single frequency, the maximum cell density is limited by the capacity of the shortest (innermost) track on the disk. As a result, the longer outer tracks are under-utilized.
In a known industry approach to increasing disk cell density, each disk is segmented into concentric bands, each band containing a plurality of tracks. Each successive band from the center out is accorded a higher writing/reading frequency than the next prior band. This approach enables the defining of a greater number of cells in each successive band of longer tracks, and thus increases total disk cell density.
The head data signal generated when retrieving data from a medium is converted from analog to digital format and is then applied to a data separator circuit. A phase-locked loop circuit is conventionally used to extract a timing signal from the digital read signal. This timing signal is applied to the data separator to enable extraction of data from the digital read signal.
The timing signal output of the phase-locked loop is typically supplied by a voltage or current controlled oscillator, which is driven based upon frequency and phase differences between the oscillator output and the loop input. These differences are detected by an error detector circuit (e.g., a frequency/phase comparator) and cause a charge pump circuit to issue a control signal to a control input of the oscillator to effect frequency/phase adjustments to the oscillator output.
In operation of a multi-band system, the oscillator can be driven approximately to the band frequency of the data input signal it next expects to acquire by applying an appropriate control signal to the oscillator during the head in-transit period. Hence, hardware requirements are relaxed in view of the smaller frequency swing (if any) which later will be required to tune the oscillator to the actual frequency of the data input signal when it is received. This minimizes the voltage swing demanded of the charge pumps used to drive the oscillator. Consequently, if the oscillator is about at the frequency of the next expected data input frequency, then when the next expected data input signal is applied to the loop, the loop will be able to drive the oscillator quickly to the frequency/phase of that input.